1. Technical Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, a semiconductor device, a circuit board, and an electronic apparatus.
2. Description of the Related Art
At present, in portable electronic apparatuses such as mobile phones, notebook personal computers and PDA (personal data assistants), in order to reduce size and weight, the miniaturization of various electronic components such as internal semiconductor chips has been advancing and therefore spaces on which such electronic components are mounted have been limited.
Therefore, for example, in semiconductor chips, packaging methods thereof have been improved and a micro-packaging method called CSP (Chip Scale Package) has been currently devised. Semiconductor chips manufactured by the CSP technique have a packaging area that is substantially the same as the chip area; hence, high-density mounting can be achieved.
For the above electronic apparatuses, it is presumed that the miniaturization and multi-functionalization further advance; hence, the packaging density of the semiconductor chips must be further increased. In view of the above situation, a technique for three-dimensionally stacking the semiconductor chips has been proposed. The three-dimensional chip-stacking technique is as follows: semiconductor chips having the same function are stacked or semiconductor chips having different functions are stacked, and the semiconductor chips are wired, thereby densely mounting the semiconductor chips (see, for example, Japanese Unexamined Patent Application Publication No. 2002-170919).
In the three-dimensional stacking technique, a method for wiring the semiconductor chips is critical. This is because in order to allow a semiconductor apparatus comprising a plurality of semiconductor chips to exert predetermined functions, the semiconductor chips must be wired according to design and firmly connected to each other so as to achieve the toughness and reliability of the semiconductor chips.
Semiconductor chips used for the three-dimensional chip-stacking technique each include electrodes each disposed on the front face and back face and have a perforation that extends therethrough and has a prism or cylindrical shape. The semiconductor chips have an electrode configuration in which the perforation is filled with a conductive material and the electrodes each disposed on the front face and back face are electrically connected to each other with the conductive material. When the semiconductor chips having such an electrode configuration are stacked, an electrode on the back face of one of the semiconductor chips is connected to an electrode on the front face of another one, whereby the semiconductor chips are wired.
In the method for wiring the semiconductor chips used in the three-dimensional chip-stacking technique, there are some problems. First, yield is low and manufacturing cost is high because it is difficult to align the electrodes of the semiconductor chips precisely when the semiconductor chips are stacked. Secondly, since the conductive material is connected to the electrodes with a solder (brazing alloy) disposed therebetween, the solder is forced out between the conductive material and electrodes, thereby causing troubles such as short circuits between terminals. Thirdly, since the alignment of the electrodes is difficult and a junction of each terminal and the conductive material for connecting the electrodes each disposed on the front face and back face is readily broken, the reliability of the connection between the terminal and conductive material is low.
The present invention has been made in order to solve the above problems. It is an object of the present invention to provide a method for manufacturing a semiconductor device, a semiconductor device, a circuit board, and an electronic apparatus. In such a semiconductor device, semiconductor chips can be readily aligned when they are stacked and terminals can be prevented from being short-circuited, thereby enhancing the reliability of the connection between electrodes of the semiconductor chips.